FREQUENTLY ASKED QUESTIONS
GENERAL QUESTIONS
-
We have support for Keil, IAR, and Eclipse
-
We suggest you use the Segger J-Link Base.
-
JTAG is for factory use only. SWD port must be used for debugging and programming.
-
VORAGO Arm® Cortex-M0 and Arm® Cortex-M4 products have proven flight heritage on multiple missions. View a selection of flight badges from our flight heritage here.
-
Linux support is available as of late 2022.
-
We recommend the Cypress FM25V20A FRAM.
-
We have created a MBE vs. Scrub Rate Calculator for customer use, which can be requested here.
-
Yes, we have a sample project available.
Arm® Cortex®-M4 VA416XX Questions
-
Either 8-bit or 16-bit. If the EBI is used for booting, a 16-bit memory is required.
-
No, eFuses are programmed at final test before shipment.
-
No, these should be tied to ground.
-
The VA41630 contains an internal SPI memory for boot, but can also boot from the EBI.
VA41620 must have an external memory connected to either ROM SPI pins or EBI.
-
No, all resets will appear as a POR.
-
Yes, the internal NVM can store program code. Note that this memory is 256 kB, so the program code must fit with the boot code if not booting via EBI.
-
No.
-
This is highly recommended. The internal 20MHz clock is designed only to clock the device during the boot process.
-
Using the PLL, these parts can be clocked at any frequency up to 100MHz.
-
Yes, the 1.5V supply should be applied before or concurrently with the 3.3V supply when using external supplies.
-
We have thermal data for the 176-pin ceramic package only at this time.
-
The VA416xx board support package (BSP) provides sample software projects as well as peripheral firmware drivers.
-
-
No, trimming and forming the leads of the device are the responsibility of the customer to match with their PCB requirements.
SUBSCRIBE TO OUR NEWSLETTER FOR THE LATEST UPDATES ON VORAGO TECHNOLOGIES PRODUCTS AND SERVICES.